Embedded Human Activity Recognition Design Contest
Organizers: Umit Ogras (Arizona State University), Hyung Gyu Lee (Daegu University)
Thank you for participating in the ESWEEK IoMT Design contest. We had a total of 16 registrations from 7 countries.
The winner of the 2019 contest is:
Ozge Akmandor, Princeton University
Advisor: Prof. Niraj K. Jha, Princeton University
Motivation and Background
Human Activity Recognition (HAR) has been a very active research field since it is the first step to monitor, diagnose, and cope with movement disorders [Daneault]. Rise of smartphones and wearable devices enabled many new embedded system solutions on these platforms. However, access to common set of experimental data has been a major obstacle that prevents breakthrough in this area. According to the International Technology Work Force on Parkinson’s Disease, two major technology barriers are lack of compatible platforms and isolated research efforts [Espay et al.]. We are organizing the First Embedded Human Activity Recognition (HAR) Design Contest to stimulate research and innovative solutions towards practical IoMT for health monitoring.
What is Provided to the Participants?
- Raw data from a 3-axis accelerometer placed at the right ankle
- Raw data from a stretch sensor placed on a knee sleeve
- Activity labels for the raw data
- Example features for each labeled activity window
- A baseline reference HAR classifier [Bhat’18] implemented in Matlab using this data
What Should Be Submitted?
The goal of the contest is to design energy-efficient HAR classifiers. The participants can start either with the raw data (items 1-3 above) or use the example features provided to them (item 4 above), which will lower the barrier to entry. The designs can be submitted in one of the following categories:
Category-1: An embedded implementation on TI CC2650 MCU or a compatible IoT device
– Designs in this category will be evaluated based on classification accuracy, execution time per activity, and energy consumption per activity.
Category-2: An FPGA implementation
– Designs in this category will be evaluated based on classification accuracy, execution time, and area.
All submissions must include:
- A paper (up to 2 pages)* that describes the design and the results
- One slide executive summary
- The project source files (C, Verilog, or VHDL)
*The paper must be in PDF format and should not exceed 2 pages in ACM two-column format (9pt on 8.5″x11″ letter size paper). For formatting instructions and templates, please use the “ACM Proceedings templates: ACM Standard (sigconf)” available from the ACM web site.
Presentations at ESWEEK
- Introduction of the design contest
- Background on human activity recognition
- Announcements of the design contest winnner
- Presentations of the selected entries
- Demonstrations of selected designs
Registration to the Contest: May 22, 2019 – July 19, 2019 (This step is required to receive the datasets. Please register using this link.)
Design Submission Deadline: July 21, 2019
Notifications: August 17, 2019